1. Field of the Invention
The present invention relates to semiconductor devices and their manufacture, and more specifically to a structure and method of making a field effect transistor (FET) of the finFET type having a channel region with a plurality of parallel fins and a stressor region embedded in at least one of a source or drain region thereof.
2. Description of the Related Art
FinFETs such as shown in FIG. 1 are known which have a channel region with a plurality of parallel fins and a gate overlying the plurality of fins. The fins typically extend in a direction 10 parallel to a major surface of a semiconductor substrate from one peripheral edge 16 of an active semiconductor region to another such peripheral edge 18 opposed thereto. Trench isolation trenches 14 typically extend in the same direction 10 as the fins 12 and extend from the peripheral edge 16 of the active semiconductor region to the other peripheral edge 18 opposed thereto. Such configuration of the fins 12 and isolation trenches 14 extending beyond the channel region can make it difficult to form a semiconductor stressor region in one or more of the source region and drain region of the finFET which are separated from one another by the channel region 104. The presence of the isolation trenches 14 in these areas can decrease the amount of stress that the semiconductor stressor region can apply to the channel region 104. In addition, an effective semiconductor stressor region must be formed without resulting in certain unwanted electrical characteristics such as device punch-through.
Further improvements can be made to the structure and fabrication of finFET devices.